TSMC denies having problems with 28-nm

TSMC’s European president, Maria Marced, has denied claims by analyst outfit Gartner that her outfit is having yield problems on 28-nm process technologies.

Speaking to EE Times, Marced claimed that the roll out of the 28-nm chip manufacturing node is “on plan.”

She also rubbished claims that foundries were seeing a reduction in demand for the technology and said that, if it was a trend, it had not been spotted at TSMC. Marced reiterated the claim made in May 2011, that the 28 nm node is ramping three times faster than the 40 nm node that preceded it.

The outfit is in volume production at 28 nm with Altera, AMD, Nvidia, Qualcomm and Xilinx. It is also trying to test wafers to lure Apple’s A6 processor business away from Samsung.

Marced said that 28 nm will represent two percent of revenue in Q4 and in the second half of 2012 it will be greater than 10 percent.

She said that the run rate of tape outs continues was three times 40 nm. The number of tapeouts “completed or very close to completed” is 40 while TSMC knows of a total of 89 28 nm chip design projects, she said.

But much of the questions about TSMC have focused on yield rates and this was exactly what Marced avoided answering. She admitted that 28 nm was a lot harder than 40 nm. Meanwhile TSMC is pushing through to 20 nm to gain a competitive advantage over rival foundries.