TSMC claims 40nm problems really are over

Taiwanese chipmaker, TSMC, reckons its 40 nanometer manufacturing problems are done and dusted, despite our sources telling us that wafer allocation and reduced supply are still the norm and will be for a while to come.

Digitimes recently reported hearing Mark Liu, the firm’s senior VP of operations, boasting that TSMC’s yield rates for the problematic 40 nanometer process had improved and was even nearing the same levels of quality as the firm’s 65 nanometer node process.

Our secret sauces tell us that currently 40 nanometer makes up only about five percent (or less) of TSMC’s wafer production and that because GlobalFoundries is not offering this variant of 40 nanometers  – the firm is focused on 40 LP in the short-term –  firms like Nvidia and AMD may have to grin and bear it with TSMC as their already limited inventory continues to deplete itself.

Liu also made an interesting comment about the nature of the problem itself, claiming it had something to do with chamber matching problems impacting yield rates.

But an industry insider told TechEye he was really surprised Liu had released the reason for the yield problem to the media, and expressed a certain scepticism that it was the only problem TSMC faced when it came to poor yields.

“There must be another reason,” he told us on condition of anonymity.

Meanwhile, AMD is doing its best to make punters and analysts alike believe it will not be affected by any further 40nm shortages, with the firm’s CEO, Dirk Meyer, saying Thursday that he didn’t see “anything unhealthy in inventory levels downstream from us.”

Another AMD spinner assured us: “The supply looks like a funnel on its side, and we’re definitely not in the narrow part of the funnel anymore.”

But with Nvidia’s Fermi still delayed and not looking likely to emerge before mid-March, with the unofficial word-on-the-street being that this is down to TSMC’s 40nm problems, we wonder whether AMD may be being economical with the truth on that front.