Synopsys, GlobalFoundries team up for 28nm process PHY IP

Synopsys and GlobalFoundries said that they are teaming up to develop the DesignWare interface PHY IP for 28 nanometer technologies.

The partnership will see the development of Synopsys’ DesignWare PHY IP for GlobalFoundries’ 28 nanometer process. This will cover the USB 3.0, USB 2.0, HDMI 1.4 Tx and Rx, DDR3/2, PCI Express 2.0 and 1.1, SATA 1.5/3Gb/s and 6Gb/s and XAUI connections.

The two companies have previously worked together on developing DesignWare PHY IP for the 180 nanonmeter and 32 nanonmeter processes, now adding the 28 nanonmeter process to the mix and hinting that more may come of the partnership over time.

“Our 28nm HKMG processes with ‘Gate First’ technology are aimed at delivering a new level of performance and power efficiency for the next generation of SoC designs,” said Walter Ng, vice president of the IP ecosystem at GloFo. 

He added that teaming up with Synopsys “will enable our mutual customers to quickly ramp into high volume and bring their innovations to the marketplace.”

The 28 nanonmeter process come in high performance or super low power variations and GlobalFoundries is advertising them as delivering “fast processing with minimal leakage”, making them a good fit with Synopsys’ DesignWare PHY IP, which, Synopsys, says needs “minimal area and low dynamic and leakage power consumption.”

Front end design views are currently available, while design kits will be available in the first quarter of 2011, with further products in the DesignWare PHY IP line also planned for next year.