Samsung’s foundry arm has announced that it will soon be manufacturing a chip, which it claims meets the “energy-efficient requirements of next-generation mobile consumer electronics.”
The 32 nanometre LP HKMG low-power (LP) process with high-k metal gate (HKMG) technology was created in partnership with the IBM Joint Development Alliance (JDA) has completed testing at the company’s factory in Giheung, Korea.
Stephen Woo, executive vice president and general manager, System LSI, Samsung Electronics said: “Collaborating with several key partners, we have been able to take HKMG from development to implementation in a production environment. Our customers can now seamlessly integrate their design innovations with the most advanced 32nm LP HKMG process technology, design tools, IP and manufacturing to accelerate time to market for their leading edge mobile silicon solutions.”
As part of the qualification process, Samsung Foundry designed and manufactured a 32nm LP system-on-chip (SoC) that it claims shows 30 percent dynamic power reduction and 55 percent leakage power reduction when compared to the SoC design implemented at 45nm LP at the same frequency.
It worked with EDA partners including Synopsys, Cadence Design Systems and Mentor to incorporate advances into the design flow for 32nm LP including: Advanced low power techniques including power gating, multi-threshold voltages, multi- hannel lengths and adaptive body biasing techniques were used to reduce leakage power.