Intel has produced chips on a yearly tick-tock cycle for the last decade. Thanks to the shrinking die sizes, that process may permanently become a three-step.
For those who came in late Chipzilla had significant issues going from 22- to 14-nanometers, and it extended the latter to a third generation with “Kaby Lake” CPUS. This was the first time that Intel had a break from tick-tock. Now it looks like the longer rhytum has a name which Intel calls “process, architecture, optimisation (PAO).” This will continue for its upcoming 10-nanometer chips.
During “tick” years, the chip giant upgraded its manufacturing technology to make circuits smaller — for its latest chips, for instance, the tick cycle reduced traces from 22- to 14-nanometers. During “tock” years, it uses the same circuit size and manufacturing technique, but changes the microcode, often drastically, to make chips faster and more energy efficient.
While Intel said that the latest 14-nanometer chips were on a “2.5 year cycle,” it plans to introduce three different 10-nanometer chips yearly.
With the three-step PAO, that slows the pace of innovation by effectively a third, meaning consumers will have to wait an extra year before they see significant speed improvements. The third year of a chip’s life cycle will likely see smaller performance gains, giving power users and gamers — who have become critical customers — less reason to upgrade.
Intel said that the new process is a direct result of the difficulty in building chips with traces that are just 20 silicon atoms wide.
“We expect to lengthen the amount of time we will utilize our 14nm and our next generation 10nm process technologies, further optimizing our products and process technologies while meeting the yearly market cadence for product introductions,” according to the document.
Intel has maintained that it will introduce 10-nanometer chips before its rivals. Furthermore, it says that “this competitive advantage will be extended in the future as the costs to build leading-edge fabrication facilities increase.”