Intel recently showcased its 48-core, single-chip cloud computer system (SCC) at a research event in Mountain View, California.
The experimental system – which debuted in December 2009 – has already been shipped to over 100 academic institutions and key partners, including Microsoft, UC Berkeley and the University of Illinois.
An Intel rep told TechEye that the SCC integrates many important features found in today’s Cloud datacenters into silicon, such as a packet-based mesh network and support for message-passing programming models.
“The 48-core research microprocessor contains the most Intel architecture cores ever integrated on a silicon CPU chip. Clearly, we designed the system with an eye on the future,” explained Saurabh Dighe.
“Simply put, we want to be in the forefront of fostering parallel CPU programming, and future processors may very well contain a large number of cores. So, this system allows developers and researchers to experiment and determine how best to accurately program and exploit each and every core.”
Dighe added that the system featured a “full blown” instruction set and was capable of running a specialised Linux port which would “open up” the possibility of re-using popular software, platforms and apps.
“We are providing a fully loaded system to developers and have already ported over Linpack, Apache and Java Script.”
Meanwhile, San Francisco-based chip expert David Kanter told TechEye that the 48-core microprocessor was also quite “novel” from a software perspective.
“The SCC eschews hardware cache coherency, which is standard for every other general purpose CPU. Modern OSes (e.g. Windows, Linux, OS X) all rely on hardware coherency, as does almost every application.
“The goal of the SCC is to give sufficiently knowledgeable developers an opportunity to evaluate a multi-core system that is not cache coherent and explore the advantages and disadvantages (and also explore software based cache coherency).”