Freescale announces a bunch of chippy stuff

Freescale believes in news by numbers, keeping us busy with not one, not two, not four, five, or six but three announcements today. Freescale Semiconductor has let loose details on its Xtrinsic sensing technology for motion and touch applications, as well as some other bits and pieces, below.

Xtrinsic is supposed to be a high precision motion sensing platform which is based on the full integration of an accelerometer, a processing core, memory and other embedded functions. It can, thank the heavens, register multiple sensor inputs. It’s clearly aimed squarely at the smartphone and tablet market –

Freescale is also introducing Xtrinsic Touch Sensing Software Suite 2.0 to go beyond 8-bit to 32-bit microcontrollers.

The Xtrinsic MMA9550L works with multiple sensor inputs and can perform system-level decisions within the application, says Freescale. Samples are going to be available to customers in Q3 this year, while full production will kick off in Q1 2011.

Freescale is also building on its QorIQ processor line with the new quad-core P3 platform. The P3041 is built to run on low power with improved power consumption and better system performance over predecessors. It’s got four e500mc cores based on Power Architecture technology and can run up to 1.5 GHz on under 12 watts, says Freecom, and can run on 2.5 DMIPS/MHz.

It’s got a three level cache hierachy for optimised latencies and a hardware hypervisor so it can support different OS’ within the device. Freescale boasts that it has improved Serial RapidIO and SATA IP.

The P3041 is pin-compatible with a few of Freescale’s other QorIQ products, the P4080, P4040, P5020 and the P5010. It sports dual USB 2.0 with integrated PHY and dual SATA 2.0, up to 4 PCI Express 2.0 to 5GHz, CoreNet switch fabric and a DDR3/3L SDRAM up to 1.3 GHz memory controller.

It’ll sample at the end of this year with qualification planned for the second half of 2011.

Lastly, Freescale has been touting its 64-bit QorIQ core platform, based on Power Architecture, which features the e5500 core. It’s built for high=end control and data plane apps in networking, data centre, security, enterprise storage and the aerospace markets, says Freescale. It’s promised by Freescale that the e5500 architecture is designed to reach frequencies of up to 2.5 GHz, and can run in 64-bit or 32-bit mode, making transitioning to 64-bit that, ahem, bit easier.

Freescale wants to have the 64-bit e5500 cores power its P5 line of products as well as incorporating it into future QorIQ architectures. It features flat addressable memory space of up to 64GB, an L1 cache, backside L2 cache and shared L3 cache and a 7-stage pipeline with out-of-order execution.

Samples will again be going out to customers at the tail end of this year, while qualification is expected for the second half of 2011.