Contour Semiconductor Inc. located in Billerica, Massachusetts, a venture-backed company founded to produce the world’s lowest-cost, high-volume, non-volatile memory chips appears to have ceased operations. Founded in 2001 the company received its first funding in 2004 and had offices in Billerica, Massachusetts and San Jose, California.
Former President, CEO and Board of Directors Saul Zales is now looking for his next challenge. Chief Technology Officer Daniel Shepard and Vice President of Product Development Tom Trent find themselves in new gigs at HGST, a Western Digital Company. Vice President of Marketing and Business Development, Bob Witkow, is no longer listing himself with the company.
Contour’s technology focus on taking phase-change memory technology forward to a marketable commodity status never achieved traction with any of the oligarch producers. The company was in development of vertically stacking the phase-change elements to achieve high density devices. The company filed 45 patents on the technology.
An important Contour patent is the Diode Transistor Memory (DTM™) architecture that reduces the number of mask and process steps by as much as 65 percent compared to NAND flash – this results in a nearly three-fold improvement in fab capacity throughput with a corresponding 65 percent reduction in wafer cost compared to NAND.
Contour has been using phase-change as the storage element in their development work. The company indicated that future iterations of DTM™ could include magnetic or carbon nanotube storage elements. In addition to the memory cell, the streamlined fabrication process also includes a single type of n-channel transistor and non-memory diodes which are used for address decoding. Contour’s proprietary circuit techniques have been designed to optimize compatibility with existing CMOS processes.
With its cross-point array architecture, Contour’s NAND-alternative solution supports word, sector, and page-level erase commands to supplement the normal NAND flash specification, allowing significant improvement to system-level performance. Latency is minimized as the chip can directly access and modify any addressable location. With phase change material, individual cell program and erase performance is greatly improved and write endurance has been tested for up to 1 billion cycles.
The company presented at SNIA’s January 2015 Storage Industry Summit indicating that they were working on a 3rd generation device at 4 Gb using 52 nm technology. Sub Rosa commentary indicates that a key portion of the circuitry failed and would require a complete redesign – thus convincing the investment community that any further funding for Contour was not in their best interests. We’ve no reports (as of this writing) that the company’s patent portfolio has been placed up for sale or has been bought.
One sign the company was in search mode was the admonition that the technology really didn’t necessarily need to use phase-change as the storage elements – offering magnetic and carbon nanotube storage elements instead. The carbon nanotube storage elements most likely resulted from discussions with nearby Nantero in Woburn, Massachusetts.
One rather knotty issue is that Phase-Change has been supplanted by other non-volatile memory technologies. Once a highly proclaimed successor to NAND-Flash it fell to the wayside when it was found that the device would become erased if passed through a solder reflow machine in a production environment preventing them from being gang-programmed prior to the assembly process. The other issue was the high write currents that were not conducive to sub 20 nm scales. The company failed to bend with the will of market expectations until the bitter end – by then it was too late to recover from.
The level of scuttlebutt regarding Contour’s fortunes has been barely audible. The fact that they went out without a whimper is somewhat out of the ordinary – a kind of a “no one left to turn out the lights” situation. The fact that HGST, a Western Digital Company, picked up Contour’s technology people is indicative of Western Digital’s intentions to further establish their own non-volatile research operation.