Arasan has released a NAND Flash Controller supporting the newest Open NAND Flash Interface (ONFI) 3.0 specification.
According to the company, the Arasan ONFI 3.0 compliant NAND Flash Controller IP Core is a full featured, easy to use, design that can easily be slipped under the bonnet of a systems on a chip or FPGA development.
It can support the fastest transfer modes up to 400MTS with differential signalling on clock and data, and double data-rate transfers (DDR).
It uses all the ONFI 3.0 specification’s new features such as eight chip enables, page sizes up to 8K and ECC up to 64 bits with dynamic configuration, warm-up cycles. All the ONFI 3.0 commands are supported and the controller is backwards compatible with earlier versions.
The IP core uses differential signalling on the clock and data lines and clocks at any frequency up to 200 MHz. It is being targeted at mobile phones, consumer electronics and netbooks.
A company spokesman told us that the increase in capacity and performance of NAND memories is accompanied with the corresponding increase in memory controller complexity.
The Arasan’s NAND Flash Controller is designed to handle the growing raw error bit rates as NAND memory gets stressed. The controller can boot directly from NAND memory.
You can integrate Arasan’s NAND Flash Controller so SoC designers can use a variety of NAND memory devices using one ONFI interface.
Prakash Kamath, Vice President of Engineering at Arasan said that SoC designers like to exploit advances in NAND memory technology without having to develop proprietary interfaces. Thanks to Arasan’s NAND Flash Controllers, designers can use any ONFI 3.0 compliant memory, independent of the underlying NAND memory technology.”